1. Field of the Invention
Embodiments of the invention relate to apparatus and methods for deposition and/or planarization of a material, such as a metal, on a substrate.
2. Background of the Related Art
Sub-quarter micron multi-level metallization is one of the key technologies for the next generation of ultra large scale integration (ULSI). The multilevel interconnects that lie at the heart of this technology require planarization of interconnect features formed in high aspect ratio apertures, including contacts, vias, lines and other features. Reliable formation of these interconnect features is very important to the success of ULSI and to the continued effort to increase circuit density and quality on individual substrates and die.
In the fabrication of integrated circuits and other electronic devices, multiple layers of conducting, semiconducting, and dielectric materials are deposited on or removed from a surface of a substrate. Thin layers of conducting, semiconducting, and dielectric materials may be deposited by a number of deposition techniques. Common deposition techniques in modern processing include physical vapor deposition (PVD), also known as sputtering, chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), and now electro-chemical plating (ECP).
Often it is necessary to polish a surface of a substrate to remove high topography, surface defects, metal residues, scratches or embedded particles formed from the deposition and removal of materials from a substrate surface. One common polishing process is known as chemical mechanical polishing (CMP) and is used to improve the quality and reliability of the electronic devices formed on the substrate. CMP is broadly defined herein as polishing a substrate by chemical activity, mechanical activity, or a combination of both chemical and mechanical activity.
Currently, the semiconductor industry is developing processes and apparatus for depositing conductive materials on a substrate and in situ polishing of the substrate to improve manufacturing throughput. One such process is electrochemical mechanical plating process (ECMPP) which provides for the deposition of a conductive material, such as copper, on a substrate surface in an electrolyte while concurrently polishing the substrate to minimize the amount of conductive material deposited over features on the substrate. Features formed on the substrate include a dense array of narrow features and wide features. Material is deposited over both features at the same rate with the narrow features being filled first and excess material forming over the narrow features as wide features are filled. This excess material over the dense array of narrow features is referred to as the overburden and results in a non-planar surface after deposition. The overburden is typically removed using CMP processes or in some cases etchback processes.
An important goal of polishing, especially in ECMPP, is achieving uniform planarity of the substrate surface with minimal overburden. It is highly desirable that the polishing process uniformly removes material from the surface of substrates as well as removing non-uniform layers, which have been deposited on the substrate. Successful ECMPP also requires process repeatability from one substra The polishing pressure preferably has e next. Thus, uniformity must be achieved not only for a single substrate, but also for a series of substrates processed in a batch.
One difficulty with ECMPP processes is that the conductive material to be deposited may not be evenly distributed in the electrolyte over the surface of the substrate. Uneven distribution over the substrate may result in non-uniformity and the formation of defects, such as voids, in features formed in the surface of the substrate, which can detrimentally affect the quality of the substrate produced using the ECMPP process. One solution to this problem is to use a porous pad during ECMPP to allow electrolyte to reach the substrate surface. However, under current processing conditions, the ECMPP process requires a greater quantity of electrolyte at the substrate surface than what is currently provided by conventional porous polishing pads.
Additionally, for ECMPP processes, the porous pad is required to be held in position during processing to provide for uniform polishing. However, it has been found to be technically challenging to hold a porous pad in position for polishing while allowing electrolyte to flow freely through the pad to the substrate surface.
As a result, there is a need for an article of manufacture, process, and apparatus to improve polishing uniformity during deposition and polishing of a conductive material on a substrate surface.